This invention relates to an apparatus for processing semiconductor wafers or glass photomask plates, and more particularly, to improve machine operated functions improving the processing yield of semiconductor wafers. In the production of integrated circuits, the semiconductor wafers or substrates from which the chips are cut, are processed through multiple steps. The basic material for the substrates on the wafers may be silicon, glass, or ceramic materials of various sorts or other similar materials of very thin wafer-like configuration. This basic substrate is subjected to coating, etching, and cleaning processes and it is extremely important that each processing step is performed with the greatest possible yield allowing a decrease in production costs.
Semiconductor wafers and glass photomask plates in the past have been processed by spinning them about a vertical axis where the wafers or masks are stacked vertically as described in U.S. Pat. No. 3,760,822 with various holding mechanisms such as vacuum chucks. This has led to further disadvantages where the wafer may be only processed on one side at a time without a significantly different processing rate, wherein the topside processes at a much faster rate than that of the underside.
Other processing devices such as described in U.S. Pat. No. 3,970,471, process each wafer individually. Although the wafer is rotated about a horizontal axis, such a device only can process a single wafer at each station and is expensive and time consuming.
The present invention permits the processing of a plurality of wafers at the same time and, because of the substantially horizontal axis of rotation, each side of the wafer is processed at effectively the same rate. The axis of rotation is not exactly horizontal, as if it were, the wafers could lay in the carrier in a manner that might permit touching of each other which might allow a miniscus to form between two wafers which, because of the surface tension, would prohibit proper processing and reduce the yield of good semiconductor wafers.